Digital signal timing diagrams

[hazzer123]

I am writing a program for a PIC to interface with a DS1620 using its 3 wire bus. (Datasheet = http://datasheets.maxim-ic.com/en/ds/DS1620.pdf)

I am having problems with the timing diagram (pages 9 and 10)

What do the horizontal lined segments between the bytes sent along the DQ line mean?  Does it mean that it doesn't matter what the value of the DQ line is, or does it mean that the DQ line goes high sometime during that interval?

Harry

[JonHylands]

The horizontal lines show where that pin stays high or low (depending on whether the line is at the top or bottom).

- Jon

[hazzer123]

Woopsie

I meant diagonal lines sorry

There are diagonally shaded hexagons between the bits sent over the DQ liine.

Thank you

[JonHylands]

I suspect what they're saying is it doesn't matter, because they only sample the data line just after the clock line rises.

Personally, I would just leave the data line where it is for the whole bit-period...

- Jon

[hazzer123]

Ok thanks,

thats what i suspected, it is just that i read a small tutorial on the net that said that areas shaded with diagonal lines from bottom left to top right mean that the signal must go high during that period.

Cheers