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The External Interrupts are triggered by the INT0 and INT1 pins or any of the PCINT23..0 pins.Observe that, if enabled, the interrupts will trigger even if the INT0 and INT1 or PCINT23..0 pinsare configured as outputs. This feature provides a way of generating a software interrupt. Thepin change interrupt PCI2 will trigger if any enabled PCINT23..16 pin toggles. The pin changeinterrupt PCI1 will trigger if any enabled PCINT14..8 pin toggles. The pin change interrupt PCI0will trigger if any enabled PCINT7..0 pin toggles. The PCMSK2, PCMSK1 and PCMSK0 Registerscontrol which pins contribute to the pin change interrupts. Pin change interrupts onPCINT23..0 are detected asynchronously. This implies that these interrupts can be used forwaking the part also from sleep modes other than Idle mode.The INT0 and INT1 interrupts can be triggered by a falling or rising edge or a low level. This isset up as indicated in the specification for the External Interrupt Control Register A ? EICRA.When the INT0 or INT1 interrupts are enabled and are configured as level triggered, the interruptswill trigger as long as the pin is held low.