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Author Topic: Where does SPI data go on an ATMega?  (Read 734 times)

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Offline mstachoTopic starter

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Where does SPI data go on an ATMega?
« on: February 29, 2012, 02:07:11 PM »
Howdy,

This might be a simple question, but the datasheet either ignores it or hides it :-P  If I send a Byte over SPI into an ATMega, where does that byte go?  Is it stored in a register?  If so, is that register easily accessible?  Can it be expanded to hold, say, 16 bytes instead of 1?

MIKE
Current project: tactile sensing systems for multifingered robot hands

Offline Resilient

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Re: Where does SPI data go on an ATMega?
« Reply #1 on: February 29, 2012, 03:58:25 PM »
I have not really used SPI but I have seen documentation for it.

http://www.atmel.com/Images/doc2549.pdf

Pages 195-204.

It looks like SPDR is where the magic you are looking for happens.

Offline Webbot

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Re: Where does SPI data go on an ATMega?
« Reply #2 on: February 29, 2012, 04:49:41 PM »
Since the pins are just standard IO pins then if you haven't told the chip to enter 'SPI slave mode' then its like firing any info at a general I/O pin.
If it is in SPI mode then, if memory serves, it should be able to henerate an interrupt (which you have to enable and set up a handler) and the data byte is available in a register. Alternatively you can disable the interrupt and then poll a control register waiting for the relevant bit to be set to say that a whole byte has been received,
Since SPI sends bytes in and out at the same time then there is another register you can use to set the data to sent back.
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Offline joe61

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Re: Where does SPI data go on an ATMega?
« Reply #3 on: February 29, 2012, 04:50:40 PM »
If I send a Byte over SPI into an ATMega, where does that byte go?  Is it stored in a register?  If so, is that register easily accessible?  Can it be expanded to hold, say, 16 bytes instead of 1?

Let's say we're talking about a 328. There are a couple ways to do it for that chip, one is using the USART in SPI mode (which is describeed in section 20), or using the hardware SPI device (which is described in section 18).

Basically the master puts a byte into SPDR - the SPI Data Register. The chip shifts it out the MOSI line to the slave, who receives it in its SPDR. Whatever was in the slave's SPDR is shifted out the slave's MISO line to the master's SPDR.

It's only a one-byte register, so you'd have to setup an interrupt routine, or poll the status register, to put the next byte in to be set.

The data sheet says it better than I am, I've had a long day fighting with Buildroot and I'm beat.

Joe

 


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