Bluetooth to uart super fast in axon 2 need help!!

[hopslink]

By my reckoning the instructions and required cycles are as follows:

Code: [Select]

label instruction instruction cycles instruction cycles
 putchar0
  brcc putchar1 1 2
  cbi 1 x
  rjmp putchar2 2 x
 putchar1
  sbi x 1
  nop x 1
 putchar2
  nop 1 1
  nop 1 1
  nop 1 1
 
  lsr 1 1
  dec 1 1
  brne putchar0 2 2
 
  Total 11 Total 11
 

Apologies - the forum is playing silly b*ggers with the columns above. Instruction cycle count should be in two columns, one for each pathway depending on the logic value of the bit being sent.

My reckoning by no means constitutes proof. Also happy to be proven wrong

[Webbot]

The cbi and sbi opcode require 2 cycles, not 1 cycle as you show, hence the total is 12 not 11

[Graynomad]

Yours seems to be 4 instruction cycles per bit which should be 4MBaud @16MHz by my calculations

That's correct, so where does the 1.33 come from? With no NOPs it ran at 4MHz when it should have been 8.

I would suspect that there may be some additional state saving/restoring being added by the compiler

My thoughts to, so I dumped the disassembled code (version with no NOPs)

Code: [Select]

00000100 <loop>:
 100:   5f 9a           sbi     0x0b, 7 ; 11
 102:   5f 98           cbi     0x0b, 7 ; 11
 104:   5f 9a           sbi     0x0b, 7 ; 11
 106:   5f 98           cbi     0x0b, 7 ; 11
 108:   5f 9a           sbi     0x0b, 7 ; 11
 10a:   5f 98           cbi     0x0b, 7 ; 11
 10c:   5f 9a           sbi     0x0b, 7 ; 11
 10e:   5f 98           cbi     0x0b, 7 ; 11
 110:   5f 9a           sbi     0x0b, 7 ; 11
 112:   5f 98           cbi     0x0b, 7 ; 11
 114:   5f 9a           sbi     0x0b, 7 ; 11
 116:   08 95           ret
Apart from the fact that the optimizer has put the code directly into the loop() function there's no funny business, straight CBI and SBI instructions.

This is the weirdest thing, this should produce 8MHz on a 16MHz chip but it does 4. It's as though the CKDIV8 fuse it set, but of course that would be even slower. Is there a CKDIV2 fuse

______
Rob
 

[Graynomad]

SOLVED, I guess I should have looked at the instruction set eh? CBI and SBI take two cycles.

EDIT: Sorry Webbot, just saw you've already said that.

______
Rob

[hopslink]

Thanks Webbot and Rob. I should have looked more thoroughly and had completely missed that Still learning!

[Graynomad]

completely missed that

Me too, and I've been doing this for a long time 

What I don't understand is why it takes 2 cycles, it shouldn't be a read-modify-write, given that these instructions only work on the lower regs and there's only 8 bits the whole opcode should fit in a single word, just set or clear a bit and I would think the hardware could do that in 1 cycle.

______
Rob