After a look at the source code in the library, and correct me if I am wrong, because it locks bits TWBS0/1 to 0 in the TWSR register, it restricts you to 62khz as there is no prescaler value as its 1. There is another issue, and again correct me if I am wrong. In the library routine (see below) it has declared bitrate_div as 8 bits. So, what would happen below if (cpu_speed_div_1000 / bitrateKHz) was greater than 255? Well, you'd get an overflow and the setting would end up all wrong. Eg, say if you had 160000/20, the answer is 800, or in hex 0x0320. This gets truncated to 0x20 and we end up with the wrong answer.
static void speed(const I2C_ABSTRACT_BUS* bus,uint16_t bitrateKHz){
uint8_t bitrate_div;
// set i2c bitrate
// SCL freq = F_CPU/(16+2*TWBR))
#ifdef TWPS0
// for processors with additional bitrate division (mega128)
// SCL freq = F_CPU/(16+2*TWBR*4^TWPS)
// set TWPS to zero to make = F_CPU/(16+2*TWBR)
cbi(TWSR, TWPS0);
cbi(TWSR, TWPS1);
#endif
// calculate bitrate division
bitrate_div = cpu_speed_div_1000 / bitrateKHz;
if(bitrate_div >= 16)
bitrate_div = (bitrate_div-16)/2;
outb(TWBR, bitrate_div);
}
So I reckon that if you need to set the I2C speed, you should load the registers directly yourself (check out the PDF on the ATmega640). The registers are TWBR (0xB8) and TWSR (0xB9). Rant over! Would welcome any comments as if this is all OK, then it should be flagged as a problem. Anyway, with some luck, this should get the guys sorted.
Oscar